The present invention relates to ferromagnetic thin film memories and, more particularly, to ferromagnetic thin film memories in which states of the memory cells based on magnetization direction are determined through magnetoresistive properties of the thin film sensed by an electronic circuit.
Digital memories of various kinds are used extensively in computers and computer system components, in digital processing systems, and the like. Such memories can be formed, to considerable advantage, based on the storage of digital bits as alternative states of magnetization in magnetic materials in each memory cell, typically thin film materials. These films may be ferromagnetic thin films having information stored therein through the direction of the magnetization occurring in that film, this information being obtained through either inductive sensing to determine the magnetization state, or by magnetoresistive sensing of such states. Such ferromagnetic thin film memories may be conveniently provided on the surface of a monolithic integrated circuit to provide easy electrical interconnection between the memory cells and the memory operating circuitry.
Ferromagnetic thin film memory cells can be made very small and packed very closely together to achieve a significant density of stored digital bits, properties which permit them to be provided on the surface of a monolithic integrated circuit as indicated above. One construction, as an example, is shown in FIG. 1, where a bit structure 10 for a memory cell is presented formed over a semiconductor material body 12, as used in a monolithic integrated circuit, and directly on an insulating layer 13, itself supported on a major surface of body 12 in the integrated circuit. Only a small portion of the integrated circuit is shown, and then only a small portion of the semiconductor body is shown in that integrated circuit portion.
These bit structures in an assemblage in a memory are usually provided in a series string of such bit structures often called sense lines. There are typically a plurality of such sense lines in a memory. In order to make interconnections between members of such sense lines, or between the sense lines and the external circuitry in the integrated circuit for operating the memory, terminal regions or junctures 14 are typically provided at each end of the bit structure for interconnection purposes. These interconnections might be formed of copper alloyed in aluminum.
The remainder of the bit structure disposed on the exposed major surface of insulating layer 13 includes a lower ferromagnetic thin film 15, and an upper ferromagnetic thin film 16. Ferromagnetic thin film layers 15 and 16 typically exhibit uniaxial anisotropy, magnetoresistance, little magnetostriction, and are of an alloy composition typically comprising nickel, cobalt and iron. The lower ferromagnetic thin film 15 is typically thicker than the upper ferromagnetic thin film 16. Accordingly, the lower ferromagnetic thin film 15 is often called the hard layer, and the upper ferromagnetic thin film 16 is often called the soft layer.
Between ferromagnetic thin film layers 15 and 16 is typically a further thin layer 17 which usually would not exhibit ferromagnetism but may be either an electrical conductor or an electrical insulator. Layer 17 must, however, in this construction, minimizes the exchange interaction between layers 15 and 16 so that the magnetization vectors of each layer are decoupled. A typical choice for layer 17 would be copper. An insulating layer 18 covers bit structure 10 although only a part of it is shown in FIG. 1.
Finally, a word line 19 is shown in FIG. 1 disposed on the major surface of insulating layer 18. Word line 19 typically includes an aluminum layer alloyed with copper on a titanium-tungsten base layer. A protective and insulating layer over the entire structure of FIG. 1 is often used in practice, but is not shown here.
Bit structure 10 can be operated in a longitudinal mode having its easy axis extend between internal interconnections 14 perpendicular to the direction of word line 19, or in a transverse mode having its easy axis of magnetization parallel with the direction of word line 19. In either situation, information kept as a digital bit having one of two alternative logic values in bit structure 10 is stored therein in layer 15 by having the magnetization vector point in one direction or the other, generally along the easy axis of magnetization. If the direction of magnetization is caused to rotate from such a direction by external magnetic fields, the electrical resistance of layers 15 and 16 changes with this magnetization direction rotation because of the magnetoresistive properties of such layers. For the kinds of materials typically used in layers 15 and 16, the maximum change in resistance is on the order of a few percent of the minimum resistance value.
Sense current refers to the current flow through bit structure 10 from one terminal 14 to the other terminal 14 thereof, and word current refers to current flowing in word line 19 adjacent to, and transverse to the orientation of, bit structure 10. Bit structure 10 can be placed in one of the two possible magnetization states of layer 15 (hard layer) through the selective application of sense and word currents, i.e., information can be "written" in bit structure 10. A bit structure 10 of a typical configuration can be placed in a "0" magnetization state by the application of a sense current of typically 1.0 mA, and coincidentally with provision of a word current in one direction from 20 mA to 40 mA. The opposite magnetization state representing a "1" logic value can be provided through providing the same sense current and a word current of the same magnitude in the opposite direction. Such states typically occur fairly quickly after the proper current levels are reached, such state changes typically occurring in less than about 5 ns.
Determining which magnetization state is stored in bit structure 10, i.e., reading the information stored in bit structure 10, is typically done by providing externally caused magnetic fields in that bit structure, through providing, for example, wordline currents and sometimes coincident sense line currents. These currents rotate the magnetization of the upper ferromagnetic thin film 16 (soft layer) of the bit structure 10, but preferably not the lower ferromagnetic thin film 15 (hard layer). As indicated above, this causes a change in the electrical resistance encountered between terminal regions 14 in bit structure 10 for different magnetization directions in the structure, including changing from one easy axis direction magnetization state to the opposite direction state. As a result, there is detectable differences in the voltage developed across magnetic bit structure 10 by the sense current flowing therethrough, depending on the relative magnetization direction of the hard and soft layers of bit structure 10.
To read the state of the bit structure 10, and now referring to FIG. 2, a wordline current is typically provided over a selected bit structure in a first direction, as shown at 40. The wordline current produces an externally generated magnetic field in the bit structure 10. The magnitude of the wordline current must be large enough to rotate the soft layer 15 of the bit structure 10, but typically small enough to not rotate the hard layer 16. A typical wordline current is 10-20 mA. This may correspond to point "A" in FIG. 3 or FIG. 4, as more fully described below.
A sense current is then provided to the bit structure 10, concurrent with the wordline current, and the resulting voltage (resistance) across the bit structure 10 is sensed. If the magnetization of the soft layer 16 is parallel to the magnetization of the hard layer 15, the voltage (resistance) is relatively low, as shown, for example, at point "A" of FIG. 3. If the magnetization of the soft layer 16 is anti-parallel to the magnetization of the hard layer 15, the voltage (resistance) is higher, as shown, for example, at point "A" in FIG. 4. The sensed voltage (resistance) is then stored using an auto-zero circuit. The time typically required to sense the voltage (resistance) of the bit structure 10 is typically about 50 ns. This time is relatively long, at least in part, because of the noise generated by the relatively large wordline current that is present during the sensing operation.
After the voltage (resistance) of the bit structure is sensed with the wordline current in the first direction, the wordline current is reversed, as shown at 42 in FIG. 2. The magnitude of the wordline current is again large enough to rotate the soft layer 15 of the bit structure 10, but typically small enough to not rotate the hard layer 16. This may correspond to point "F" in FIG. 3 or FIG. 4. A sense current is then provided to the bit structure 10, concurrent with the wordline current, and the resulting voltage (resistance) across the bit structure 10 is again sensed. The time typically required to sense the voltage (resistance) of the bit structure 10 is again about 50 ns. The sensed voltage (resistance) is then compared to the previously sensed voltage (resistance) stored by the auto-zero circuit. If the resistance change is positive, one logic state is read. If the resistance change is negative, the opposite logic state is read.
The above-described reading procedure suffers from a number of disadvantages. One disadvantage is that the relatively large wordline current (10-30 mA) must be provided throughout each sensing operation. This is particularly problematic because each sensing operation may take on the order of 50 ns to sense the voltage (resistance) of the bit structure 10. Therefore, the read operation may consume a significant amount of power.
Another disadvantage is that the substantial wordline current, which must be on during each of the sense operations, often causes a significant amount of noise at the bit structure 10, which can reduce the signal-to-noise ratio on the sense lines and slow the sensing operation. One approach for reducing the noise caused by the wordline current is to provide superior wordline drivers which produce relatively stable wordline current. However, this approach may only reduce the noise injected by the wordline currents, and not eliminate it. Further, providing superior wordline drivers can increase the complexity, area, and power of the memory circuit.